Wow, amazing catch! You found the missing link in Power_Class.cpp.
I was completely blindsided by some outdated M5 documentation that pointed towards register 0x10 as a standalone switch. Your snippet makes it clear: for the StickS3, it's actually register 0x06``, and we specifically need to flip bit 3 (0x08`) using a read-modify-write approach to avoid messing up other critical PMIC functionalities.
Looking deeper into the M5PM1 datasheet and schematics, it turns out it’s a two-stage process. Register 0x06 bit 3 enables the central DCDC_5V boost circuit, while register 0x10 controls the actual GPIO output configuration of the PMIC to route that 5V out to the Grove port (EXT_5V_EN).
I translated this exact logic into an ESPHome on_boot lambda using the native IDFI2CBus methods under the esp-idf framework, tackling both registers:
`YAML on_boot:
priority: 800.0 # Run very early in the boot process
then:
- lambda: |-
auto* internal_bus = new esphome::i2c::IDFI2CBus();
internal_bus->set_sda_pin(11);
internal_bus->set_scl_pin(12);
internal_bus->set_frequency(100000.0);
internal_bus->setup();
// --- STEP 1: Read-Modify-Write Register 0x06 ---
uint8_t reg_addr_06 = 0x06;
uint8_t reg_val_06 = 0;
if (internal_bus->write(0x34, ®_addr_06, 1) && internal_bus->read(0x34, ®_val_06, 1)) {
reg_val_06 |= 0x08; // Set bit 3 high
uint8_t write_payload_06[2] = {0x06, reg_val_06};
internal_bus->write(0x34, write_payload_06, 2);
}
// --- STEP 2: Configure PMIC GPIO1 Output (Register 0x10) ---
uint8_t write_payload_10[2] = {0x10, 0x03}; // Push-Pull Output HIGH
internal_bus->write(0x34, write_payload_10, 2);
delete internal_bus;`
The issue I'm facing now: Even though this C++ code compiles fine and completely fixes the dreaded SCL is held low bus recovery errors on boot, the SCD41 sensor still refuses to cooperate. The ESP32 clears the lines, but the sensor never responds on address 0x62.
Worse yet, pulling raw registers on the M5PM1 without the full M5Unified state-machine running in the background seems to cause severe instability during the early boot phase. The ESP32 occasionally panics and crash-loops so fast that ESPHome triggers an automatic safe-mode OTA rollback (Last reset too quick; OTA rollback detected!), wiping out the custom configuration.
It feels like the PY32 PMIC co-processor requires some extra initialization scaffolding (clocks, power domains, or sleep states) to safely sustain the Grove power rail under pure ESPHome.
Any ideas on what I might be missing here? Has anyone managed to successfully get the Grove power rail stable on the StickS3 within ESPHome?