
NP_Complete
A slightly messy 24 years of experience across a range of technologies mostly at the pioneering or low maturity end of the scale. Today I design silicon chips for a living, more precisely FPGAs, but now we’re diving into acronyms…
A slightly messy 24 years of experience across a range of technologies mostly at the pioneering or low maturity end of the scale. Today I design silicon chips for a living, more precisely FPGAs, but now we’re diving into acronyms…