WT32-sc01 Plus /ESP32-S3 ESP HOME

ESPHome
1

Hello! I bought a WT32-sc01 Plus /ESP32-S3 display module from China, but I made the display work on 8Bit MCU (8080) Parallel not SPI. As far as I know, there is no display with 8080 protocol by default on esphome.io
I found a project “GitHub - strange-v/ha_deck: Config-driven Home Assistant dashboard (built on top of ESPHome)” but which also uses LVGL and is already beyond me.
has anyone used this display in espHome?
was LVGL natively implemented in espHome?
display driver ST7796UI 480x320 MCU8080 8Bit
Capacitive touch FT6336U I2C

datasheet: https://www.marutsu.co.jp/contents/shop/marutsu/datasheet/khe_WT32-SC01-PLUS.pdf

P.S. it came with some predefined software in Chinese and it worked very smoothly, only good for making various HMIs for the home assistant.
​

1 Like
2

No, but you could use openhasp.

3

I tried with openhasp, but it seems like I’m still at first love, esphome. how to apply for support? maybe I’ll be lucky and support will come in the next update.

1 Like
4

I also bought a WT32-sc01 Plus. I got it working with GitHub - strange-v/ha_deck: Config-driven Home Assistant dashboard (built on top of ESPHome). I like that it is a ESPHome component and the integration into Home Assistant works well. The configuration of the UI components is a little bit limited and I had some issues with hiding components, but it works.

I tried openhasp yesterday. The UI is much more configurable, but the JSON is very complicated and I can’t add additional components or sensors. Also it’s more effort to get data from Home Assistant to openhasp than with ESPHome.

I would love to see native support for the display and touch screen in ESPHome! Especially I would like to test this component LVGL implementation for ESPHome by clydebarrow · Pull Request #6363 · esphome/esphome · GitHub

2 Likes
5

Hi there, I have added support for the WT32-SC01 Plus module to TFT_eSPI and created a pull request (3423). While it is being reviewed you can give it a spin using my fork.

2 Likes
6

hi many thanks for this !!! will have a try when back from hollidays :slight_smile:

7

I have also a wt32-sc01 plus - ZX3D50CE08S-V15 230208 and I am also trying to get it running with esphome firmware and the LVGL Graphics component.

PXL_20240918_142519736~2
PXL_20240918_142519736~21920×1232 256 KB

On Aug 6 2024 [lvgl] Final stage by clydebarrow · Pull Request #7184 · esphome/esphome · GitHub was merged: The implementation of LVGL in ESPHome in a native way - configured with YAML. A big step for touch displays!

Unfortunatly, Implement i80 bus for ili9xxx displays by clydebarrow · Pull Request #6537 · esphome/esphome · GitHub, very relevent for the display driver ST7796UI with the MCU8080 8Bit bus, was closed (not merged) on Aug 7 2024. I will keep following @clydebarrow for any new PR.

Futhermore, dkalliv PR, Add support for WT32-SC01 Plus module by dkalliv · Pull Request #3423 · Bodmer/TFT_eSPI · GitHub, is stil open (Review required). Is there any way I can use it?

However, someone called bearpawmaxim mentioned he got his wt32-sc01 plus working with LVGL. He left a snipped of his esphome config yml in where he included the PR #6537. I tried to use his config snipped for my own config, but I am missing parts.

Below my config. I used the esp32-s3-devkitc-1 board and the esp-idf framework. Can anyone confirm whether that is correct?

I didn’t include the FT6336U touch screen component and the lvgl Graphics component. Has anyone an example?

substitutions:
  device_name: wt32-sc01-plus
  friendly_name: WT32-SC01 Plus
  device_ip: !secret IP_ADDRESS_WT32-SC01_PLUS

esphome:
  name: ${device_name}
  friendly_name: ${friendly_name}

esp32:
  board: esp32-s3-devkitc-1
  framework:
    type: esp-idf
    
# Enable logging
logger:

# Enable Home Assistant API
api:
  encryption:
    key: !secret encryption_key

ota:
  - platform: esphome
    password: !secret ota_password

wifi:
  ssid: !secret wifi_ssid
  password: !secret wifi_password
  manual_ip:
    static_ip: ${device_ip}
    gateway: 192.168.11.1
    subnet: 255.255.255.0

  # Enable fallback hotspot (captive portal) in case wifi connection fails
  ap:
    ssid: '${device_name}_Fallback_Hotspot'
    password: !secret wifi_password

captive_portal:

web_server:
  port: 80
  auth:
    username: admin
    password: !secret webserver_password

external_components:
  - source: github://pr#6537
    components: [ io_bus, i80, spi, ili9xxx ]

i80:
  - id: i80bus
    dc_pin: GPIO0
    wr_pin: GPIO47
    data_pins:
      - GPIO9
      - GPIO46
      - GPIO3
      - GPIO8
      - GPIO18
      - GPIO17
      - GPIO16
      - GPIO15

display:
  - platform: ili9xxx
    model: ST7789V
    bus_type: i80
    reset_pin: GPIO4
    data_rate: 20MHZ
    pixel_mode: 18bit
    color_order: bgr
    invert_colors: true
    dimensions:
      width: 480
      height: 320
    transform:
      swap_xy: true
    auto_clear_enabled: false

I was able to do a succesfull build for this incomplete config:

Linking .pioenvs/wt32-sc01-plus/firmware.elf
RAM:   [=         ]   9.5% (used 31148 bytes from 327680 bytes)
Flash: [====      ]  44.3% (used 812201 bytes from 1835008 bytes)
Building .pioenvs/wt32-sc01-plus/firmware.bin
Creating esp32s3 image...
Successfully created esp32s3 image.
esp32_create_combined_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
Wrote 0xd6610 bytes to file /data/build/wt32-sc01-plus/.pioenvs/wt32-sc01-plus/firmware.factory.bin, ready to flash to offset 0x0
esp32_copy_ota_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
======================== [SUCCESS] Took 406.63 seconds ========================
INFO Successfully compiled program.

Any suggestion to get this working is welcome!

8

This is a working config.

4 Likes
9

I used @clydebarrow 's example config and added my on stuff:

substitutions:
  device_name: wt32-sc01-plus
  friendly_name: WT32-SC01 Plus
  device_ip: 192.168.11.196

esphome:
  name: ${device_name}
  friendly_name: ${friendly_name}
  name_add_mac_suffix: false
  project:
    name: esphome.w32-sc01-plus
    version: "1.1"
  platformio_options:
    build_unflags: -Werror=all
    board_build.flash_mode: dio

esp32:
  board: esp32-s3-devkitc-1
  framework:
    type: esp-idf
    sdkconfig_options:
      CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240: y
      CONFIG_ESP32S3_DATA_CACHE_64KB: y
      CONFIG_SPIRAM_FETCH_INSTRUCTIONS: y
      CONFIG_SPIRAM_RODATA: y

# Enable logging
logger:

# Enable Home Assistant API
api:
  encryption:
    key: !secret encryption_key

ota:
  - platform: esphome
    password: !secret ota_password

wifi:
  ssid: !secret wifi_ssid
  password: !secret wifi_password
  manual_ip:
    static_ip: ${device_ip}
    gateway: 192.168.11.1
    subnet: 255.255.255.0

  # Enable fallback hotspot (captive portal) in case wifi connection fails
  ap:
    ssid: '${device_name}_Fallback_Hotspot'
    password: !secret wifi_password

captive_portal:

web_server:
  port: 80
  auth:
    username: admin
    password: !secret webserver_password

external_components:
  - source: github://pr#6537
    components: [i80, io_bus, ili9xxx, spi]
    refresh: 1d
  - source: github://pr#7453
    components: [lvgl]
    refresh: 1h

power_supply:
  - id: backlight
    enable_on_boot: true
    pin:
      ignore_strapping_warning: true
      number: GPIO45

i80:
  dc_pin: 
    ignore_strapping_warning: true
    number: 0
  data_pins: 
    - 9
    - ignore_strapping_warning: true
      number: 46
    - ignore_strapping_warning: true
      number: 3
    - 8
    - 18
    - 17
    - 16
    - 15
  wr_pin: 47
  

i2c:
  sda: 6
  scl: 5

touchscreen:
  - platform: ft63x6
    id: my_touchscreen
    interrupt_pin: 7
    transform:
      swap_xy: true
      mirror_x: true

psram:
  speed: 80MHz

font:
  - file: "fonts/ComicSansMS3.ttf"
    id: my_font
    size: 12

display:
  - platform: ili9xxx
    bus_type: i80
    id: w32_disp
    model: st7796
    dimensions:
      height: 320
      width: 480
    transform:
      mirror_y: false
      mirror_x: false
      swap_xy: true
    reset_pin: 4
    data_rate: 4MHz
    color_order: bgr
    invert_colors: true
    auto_clear_enabled: false
    update_interval: never

lvgl:
  theme:
    label:
      text_font: my_font # set all your labels to use your custom defined font
    button:
      bg_color: 0x2F8CD8
      bg_grad_color: 0x005782
      bg_grad_dir: VER
      bg_opa: COVER
      border_color: 0x0077b3
      border_width: 1
      text_color: 0xFFFFFF
      pressed: # set some button colors to be different in pressed state
        bg_color: 0x006699
        bg_grad_color: 0x00334d
      checked: # set some button colors to be different in checked state
        bg_color: 0x1d5f96
        bg_grad_color: 0x03324A
        text_color: 0xfff300
    buttonmatrix:
      bg_opa: TRANSP
      border_color: 0x0077b3
      border_width: 0
      text_color: 0xFFFFFF
      pad_all: 0
      items: # set all your buttonmatrix buttons to use your custom defined styles and font
        bg_color: 0x2F8CD8
        bg_grad_color: 0x005782
        bg_grad_dir: VER
        bg_opa: COVER
        border_color: 0x0077b3
        border_width: 1
        text_color: 0xFFFFFF
        text_font: my_font
        pressed:
          bg_color: 0x006699
          bg_grad_color: 0x00334d
        checked:
          bg_color: 0x1d5f96
          bg_grad_color: 0x03324A
          text_color: 0x005580
    switch:
      bg_color: 0xC0C0C0
      bg_grad_color: 0xb0b0b0
      bg_grad_dir: VER
      bg_opa: COVER
      checked:
        bg_color: 0x1d5f96
        bg_grad_color: 0x03324A
        bg_grad_dir: VER
        bg_opa: COVER
      knob:
        bg_color: 0xFFFFFF
        bg_grad_color: 0xC0C0C0
        bg_grad_dir: VER
        bg_opa: COVER
    slider:
      border_width: 1
      border_opa: 15%
      bg_color: 0xcccaca
      bg_opa: 15%
      indicator:
        bg_color: 0x1d5f96
        bg_grad_color: 0x03324A
        bg_grad_dir: VER
        bg_opa: COVER
      knob:
        bg_color: 0x2F8CD8
        bg_grad_color: 0x005782
        bg_grad_dir: VER
        bg_opa: COVER
        border_color: 0x0077b3
        border_width: 1
        text_color: 0xFFFFFF
  style_definitions:
    - id: header_footer
      bg_color: 0x2F8CD8
      bg_grad_color: 0x005782
      bg_grad_dir: VER
      bg_opa: COVER
      border_opa: TRANSP
      radius: 0
      pad_all: 0
      pad_row: 0
      pad_column: 0
      border_color: 0x0077b3
      text_color: 0xFFFFFF
      width: 100%
      height: 30

Building a new firmware file went without errors:

Library Manager: [email protected] has been installed!
INFO [email protected] has been installed!
HARDWARE: ESP32S3 240MHz, 320KB RAM, 8MB Flash
 - framework-espidf @ 3.40407.240606 (4.4.7) 
 - tool-cmake @ 3.16.9 
 - tool-ninja @ 1.10.2 
 - toolchain-esp32ulp @ 2.35.0-20220830 
 - toolchain-riscv32-esp @ 8.4.0+2021r2-patch5 
 - toolchain-xtensa-esp32s3 @ 8.4.0+2021r2-patch5
Reading CMake configuration...
Generating assembly for certificate bundle...
Dependency Graph
|-- noise-c @ 0.1.6
|-- ArduinoJson @ 6.18.5
|-- lvgl @ 8.4.0
Compiling .pioenvs/wt32-sc01-plus/..........
< left out hunderds of lines >
Linking .pioenvs/wt32-sc01-plus/firmware.elf
RAM:   [=         ]  10.0% (used 32852 bytes from 327680 bytes)
Flash: [=====     ]  54.1% (used 993601 bytes from 1835008 bytes)
Building .pioenvs/wt32-sc01-plus/firmware.bin
Creating esp32s3 image...
Successfully created esp32s3 image.
esp32_create_combined_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
Wrote 0x102ab0 bytes to file /data/build/wt32-sc01-plus/.pioenvs/wt32-sc01-plus/firmware.factory.bin, ready to flash to offset 0x0
esp32_copy_ota_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
======================== [SUCCESS] Took 474.38 seconds ========================
INFO Successfully compiled program.

I flashed my wt32-sc01 plus with esptool.py without errors (but one warning!), using the recommanded settings (crystal frequency: 40Mhz, flash size 32MB, DIO for SPI MODE, burning address: 0X00):

./esptool.py --port /dev/ttyACM0 write_flash --flash_mode dio --flash_size 32MB 0x0 '/home/tedsluis/Downloads/wt32-sc01-plus.factory.bin' 
esptool.py v4.7.0
Serial port /dev/ttyACM0
Connecting....
Detecting chip type... ESP32-S3
Chip is ESP32-S3 (QFN56) (revision v0.2)
Features: WiFi, BLE, Embedded PSRAM 2MB (AP_3v3)
Crystal is 40MHz
MAC: 3c:84:27:15:99:b4
Uploading stub...
Running stub...
Stub running...
Configuring flash size...
WARNING: Set --flash_size 32MB is larger than the available flash size of 16MB.
Flash will be erased from 0x00000000 to 0x00102fff...
Flash params set to 0x025f
SHA digest in image updated
Compressed 1059504 bytes to 673994...
Wrote 1059504 bytes (673994 compressed) at 0x00000000 in 59.3 seconds (effective 143.0 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

Why did I got this warning?
Set --flash_size 32MB is larger than the available flash size of 16MB.
It was recommanded in the wt32-sc01 plus documentation to use this option.

Powering up the wt32-sc01 plus after flashing didn’t do anything.
In can see in the log file that esp32-s3 keeps booting over and over again:

[20:07:03]ESP-ROM:esp32s3-20210327
[20:07:03]Build:Mar 27 2021
[20:07:03]rst:0x1 (POWERON),boot:0xa (SPI_FAST_FLASH_BOOT)
[20:07:03]SPIWP:0xee
[20:07:03]mode:DIO, clock div:1
[20:07:03]load:0x3fce3808,len:0x16c4
[20:07:03]load:0x403c9700,len:0xbc0
[20:07:03]load:0x403cc700,len:0x2e90
[20:07:03]entry 0x403c9950
[20:07:03]I (24) boot: ESP-IDF 4.4.7 2nd stage bootloader
[20:07:03]I (24) boot: compile time 17:53:16
[20:07:03]I (25) boot: Multicore bootloader
[20:07:03]I (26) boot: chip revision: v0.2
[20:07:03]I (30) boot.esp32s3: Boot SPI Speed : 80MHz
[20:07:03]I (35) boot.esp32s3: SPI Mode       : DIO
[20:07:03]I (40) boot.esp32s3: SPI Flash Size : 32MB
[20:07:03]I (45) boot: Enabling RNG early entropy source...
[20:07:03]I (50) boot: Partition Table:
[20:07:03]I (54) boot: ## Label            Usage          Type ST Offset   Length
[20:07:03]I (61) boot:  0 otadata          OTA data         01 00 00009000 00002000
[20:07:03]I (68) boot:  1 phy_init         RF data          01 01 0000b000 00001000
[20:07:03]I (76) boot:  2 app0             OTA app          00 10 00010000 001c0000
[20:07:03]I (83) boot:  3 app1             OTA app          00 11 001d0000 001c0000
[20:07:03]I (91) boot:  4 nvs              WiFi data        01 02 00390000 0006d000
[20:07:03]I (98) boot: End of partition table
[20:07:03]I (103) esp_image: segment 0: paddr=00010020 vaddr=3c0b0020 size=31360h (201568) map
[20:07:03]I (147) esp_image: segment 1: paddr=00041388 vaddr=3fc96700 size=03d64h ( 15716) load
[20:07:03]I (151) esp_image: segment 2: paddr=000450f4 vaddr=40374000 size=0af24h ( 44836) load
[20:07:03]I (163) esp_image: segment 3: paddr=00050020 vaddr=42000020 size=ab28ch (701068) map
[20:07:03]I (289) esp_image: segment 4: paddr=000fb2b4 vaddr=4037ef24 size=077d0h ( 30672) load
[20:07:03]I (303) boot: Loaded app from partition at offset 0x10000
[20:07:03]I (303) boot: Disabling RNG early entropy source...
[20:07:03]I (304) cpu_start: Multicore app
[20:07:03]I (308) spiram: Found 16MBit SPI RAM device
[20:07:03]I (312) spiram: SPI RAM mode: sram 80m
[20:07:03]I (317) spiram: PSRAM initialized, cache is in normal (1-core) mode.
[20:07:03]I (324) cpu_start: Pro cpu up.
[20:07:03]I (327) cpu_start: Starting app cpu, entry point is 0x403762d8
[20:07:04]ESP-ROM:esp32s3-20210327
[20:07:04]Build:Mar 27 2021
[20:07:04]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[20:07:04]Saved PC:0x40376940
[20:07:04]SPIWP:0xee
[20:07:04]mode:DIO, clock div:1
[20:07:04]load:0x3fce3808,len:0x16c4
[20:07:04]load:0x403c9700,len:0xbc0
[20:07:04]load:0x403cc700,len:0x2e90
[20:07:04]entry 0x403c9950
[20:07:04]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[20:07:04]I (29) boot: compile time 17:53:16
[20:07:04]I (29) boot: Multicore bootloader
[20:07:04]I (31) boot: chip revision: v0.2
[20:07:04]I (35) boot.esp32s3: Boot SPI Speed : 80MHz
[20:07:04]I (40) boot.esp32s3: SPI Mode       : DIO
[20:07:04]I (44) boot.esp32s3: SPI Flash Size : 32MB
[20:07:04]I (49) boot: Enabling RNG early entropy source...
[20:07:04]I (55) boot: Partition Table:
[20:07:04]I (58) boot: ## Label            Usage          Type ST Offset   Length
[20:07:04]I (65) boot:  0 otadata          OTA data         01 00 00009000 00002000
[20:07:04]I (73) boot:  1 phy_init         RF data          01 01 0000b000 00001000
[20:07:04]I (80) boot:  2 app0             OTA app          00 10 00010000 001c0000
[20:07:04]I (88) boot:  3 app1             OTA app          00 11 001d0000 001c0000
[20:07:04]I (95) boot:  4 nvs              WiFi data        01 02 00390000 0006d000
[20:07:04]I (103) boot: End of partition table
[20:07:04]I (107) esp_image: segment 0: paddr=00010020 vaddr=3c0b0020 size=31360h (201568) map
[20:07:04]I (152) esp_image: segment 1: paddr=00041388 vaddr=3fc96700 size=03d64h ( 15716) load
[20:07:04]I (155) esp_image: segment 2: paddr=000450f4 vaddr=40374000 size=0af24h ( 44836) load
[20:07:04]I (167) esp_image: segment 3: paddr=00050020 vaddr=42000020 size=ab28ch (701068) map
[20:07:04]I (293) esp_image: segment 4: paddr=000fb2b4 vaddr=4037ef24 size=077d0h ( 30672) load
[20:07:04]I (308) boot: Loaded app from partition at offset 0x10000
[20:07:04]I (308) boot: Disabling RNG early entropy source...
[20:07:04]I (308) cpu_start: Multicore app
[20:07:04]I (312) spiram: Found 16MBit SPI RAM device
[20:07:04]I (317) spiram: SPI RAM mode: sram 80m
[20:07:04]I (321) spiram: PSRAM initialized, cache is in normal (1-core) mode.
[20:07:04]I (328) cpu_start: Pro cpu up.
[20:07:04]I (332) cpu_start: Starting app cpu, entry point is 0x403762d8
[20:07:05]ESP-ROM:esp32s3-20210327
[20:07:05]Build:Mar 27 2021
[20:07:05]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[20:07:05]Saved PC:0x40376940
[20:07:05]SPIWP:0xee
[20:07:05]mode:DIO, clock div:1
[20:07:05]load:0x3fce3808,len:0x16c4
[20:07:05]load:0x403c9700,len:0xbc0
[20:07:05]load:0x403cc700,len:0x2e90
[20:07:05]entry 0x403c9950
[20:07:05]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[20:07:05]I (29) boot: compile time 17:53:16
[20:07:05]I (29) boot: Multicore bootloader
[20:07:05]I (31) boot: chip revision: v0.2
[20:07:05]I (35) boot.esp32s3: Boot SPI Speed : 80MHz
[20:07:05]I (40) boot.esp32s3: SPI Mode       : DIO
[20:07:05]I (44) boot.esp32s3: SPI Flash Size : 32MB
[20:07:05]I (49) boot: Enabling RNG early entropy source...
[20:07:05]I (55) boot: Partition Table:
[20:07:05]I (58) boot: ## Label            Usage          Type ST Offset   Length
[20:07:05]I (65) boot:  0 otadata          OTA data         01 00 00009000 00002000
[20:07:05]I (73) boot:  1 phy_init         RF data          01 01 0000b000 00001000
[20:07:05]I (80) boot:  2 app0             OTA app          00 10 00010000 001c0000
[20:07:05]I (88) boot:  3 app1             OTA app          00 11 001d0000 001c0000
[20:07:05]I (95) boot:  4 nvs              WiFi data        01 02 00390000 0006d000
[20:07:05]I (103) boot: End of partition table
[20:07:05]I (107) esp_image: segment 0: paddr=00010020 vaddr=3c0b0020 size=31360h (201568) map
[20:07:05]I (152) esp_image: segment 1: paddr=00041388 vaddr=3fc96700 size=03d64h ( 15716) load
[20:07:05]I (155) esp_image: segment 2: paddr=000450f4 vaddr=40374000 size=0af24h ( 44836) load
[20:07:05]I (167) esp_image: segment 3: paddr=00050020 vaddr=42000020 size=ab28ch (701068) map
[20:07:05]I (293) esp_image: segment 4: paddr=000fb2b4 vaddr=4037ef24 size=077d0h ( 30672) load
[20:07:05]I (308) boot: Loaded app from partition at offset 0x10000
[20:07:05]I (308) boot: Disabling RNG early entropy source...
[20:07:05]I (308) cpu_start: Multicore app
[20:07:05]I (312) spiram: Found 16MBit SPI RAM device
[20:07:05]I (317) spiram: SPI RAM mode: sram 80m
[20:07:05]I (321) spiram: PSRAM initialized, cache is in normal (1-core) mode.
[20:07:05]I (328) cpu_start: Pro cpu up.
[20:07:05]I (332) cpu_start: Starting app cpu, entry point is 0x403762d8
[20:07:05]ESP-ROM:esp32s3-20210327
[20:07:05]Build:Mar 27 2021
[20:07:05]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[20:07:05]Saved PC:0x40376940
[20:07:05]SPIWP:0xee
[20:07:05]mode:DIO, clock div:1
[20:07:05]load:0x3fce3808,len:0x16c4
[20:07:06]load:0x403c9700,len:0xbc0
[20:07:06]load:0x403cc700,len:0x2e90
[20:07:06]entry 0x403c9950
[20:07:06]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[20:07:06]I (29) boot: compile time 17:53:16
[20:07:06]I (29) boot: Multicore bootloader
[20:07:06]I (31) boot: chip revision: v0.2
[20:07:06]I (35) boot.esp32s3: Boot SPI Speed : 80MHz
[20:07:06]I (40) boot.esp32s3: SPI Mode       : DIO
[20:07:06]I (44) boot.esp32s3: SPI Flash Size : 32MB
[20:07:06]I (49) boot: Enabling RNG early entropy source...
[20:07:06]I (55) boot: Partition Table:
[20:07:06]I (58) boot: ## Label            Usage          Type ST Offset   Length
[20:07:06]I (65) boot:  0 otadata          OTA data         01 00 00009000 00002000
[20:07:06]I (73) boot:  1 phy_init         RF data          01 01 0000b000 00001000
[20:07:06]I (80) boot:  2 app0             OTA app          00 10 00010000 001c0000
[20:07:06]I (88) boot:  3 app1             OTA app          00 11 001d0000 001c0000
[20:07:06]I (95) boot:  4 nvs              WiFi data        01 02 00390000 0006d000
[20:07:06]I (103) boot: End of partition table
[20:07:06]I (107) esp_image: segment 0: paddr=00010020 vaddr=3c0b0020 size=31360h (201568) map
[20:07:06]I (152) esp_image: segment 1: paddr=00041388 vaddr=3fc96700 size=03d64h ( 15716) load
[20:07:06]I (155) esp_image: segment 2: paddr=000450f4 vaddr=40374000 size=0af24h ( 44836) load
[20:07:06]I (167) esp_image: segment 3: paddr=00050020 vaddr=42000020 size=ab28ch (701068) map
[20:07:06]I (293) esp_image: segment 4: paddr=000fb2b4 vaddr=4037ef24 size=077d0h ( 30672) load
[20:07:06]I (308) boot: Loaded app from partition at offset 0x10000
[20:07:06]I (308) boot: Disabling RNG early entropy source...
[20:07:06]I (308) cpu_start: Multicore app
[20:07:06]I (312) spiram: Found 16MBit SPI RAM device
[20:07:06]I (317) spiram: SPI RAM mode: sram 80m
[20:07:06]I (321) spiram: PSRAM initialized, cache is in normal (1-core) mode.
[20:07:06]I (328) cpu_start: Pro cpu up.
[20:07:06]I (332) cpu_start: Starting app cpu, entry point is 0x403762d8
[20:07:06]ESP-ROM:esp32s3-20210327
[20:07:06]Build:Mar 27 2021
[20:07:06]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[20:07:06]Saved PC:0x40376940
[20:07:06]SPIWP:0xee
[20:07:06]mode:DIO, clock div:1
[20:07:06]load:0x3fce3808,len:0x16c4
[20:07:06]load:0x403c9700,len:0xbc0
[20:07:06]load:0x403cc700,len:0x2e90
[20:07:06]entry 0x403c9950
[20:07:06]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[20:07:06]I (29) boot: compile time 17:53:16
[20:07:06]I (29) boot: Multicore bootloader
[20:07:06]I (31) boot: chip revision: v0.2
[20:07:06]I (35) boot.esp32s3: Boot SPI Speed : 80MHz
[20:07:06]I (40) boot.esp32s3: SPI Mode       : DIO
[20:07:06]I (44) boot.esp32s3: SPI Flash Size : 32MB
[20:07:06]I (49) boot: Enabling RNG early entropy source...
[20:07:06]I (55) boot: Partition Table:
[20:07:06]I (58) boot: ## Label            Usage          Type ST Offset   Length
[20:07:06]I (65) boot:  0 otadata          OTA data         01 00 00009000 00002000
[20:07:06]I (73) boot:  1 phy_init         RF data          01 01 0000b000 00001000
[20:07:06]I (80) boot:  2 app0             OTA app          00 10 00010000 001c0000
[20:07:06]I (88) boot:  3 app1             OTA app          00 11 001d0000 001c0000
[20:07:06]I (95) boot:  4 nvs              WiFi data        01 02 00390000 0006d000
[20:07:06]I (103) boot: End of partition table
[20:07:06]I (107) esp_image: segment 0: paddr=00010020 vaddr=3c0b0020 size=31360h (201568) map
[20:07:06]I (152) esp_image: segment 1: paddr=00041388 vaddr=3fc96700 size=03d64h ( 15716) load
[20:07:06]I (155) esp_image: segment 2: paddr=000450f4 vaddr=40374000 size=0af24h ( 44836) load
[20:07:06]I (167) esp_image: segment 3: paddr=00050020 vaddr=42000020 size=ab28ch (701068) map
[20:07:07]I (293) esp_image: segment 4: paddr=000fb2b4 vaddr=4037ef24 size=077d0h ( 30672) load
[20:07:07]I (308) boot: Loaded app from partition at offset 0x10000
[20:07:07]I (308) boot: Disabling RNG early entropy source...
[20:07:07]I (308) cpu_start: Multicore app
[20:07:07]I (312) spiram: Found 16MBit SPI RAM device
[20:07:07]I (317) spiram: SPI RAM mode: sram 80m
[20:07:07]I (321) spiram: PSRAM initialized, cache is in normal (1-core) mode.
[20:07:07]I (328) cpu_start: Pro cpu up.
[20:07:07]I (332) cpu_start: Starting app cpu, entry point is 0x403762d8
[20:07:07]ESP-ROM:esp32s3-20210327
[20:07:07]Build:Mar 27 2021
[20:07:07]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[20:07:07]Saved PC:0x40376940

Does anyone have an idea why the esp32-s3 keeps boot looping and how I can fix this?

10

Did you get the 4MB or the 16MB model?

11

I got the esp32-s3-wrover-n16r2, 16MB SPI flash and 2MB PSRAM.

12

16MB is not big enough for 32MB

1 Like
13

You have me figured out, @nickrout! Indeed, I had not understood that the flash size should match the SPI flash size, but now it sound very logical :smiley:
Flashing it with --flash_size 16MB worked out well:

./esptool.py --port /dev/ttyACM0 write_flash --flash_mode dio --flash_size 16MB 0x0 '/home/tedsluis/Downloads/wt32-sc01-plus.factory (2).bin'
esptool.py v4.7.0
Serial port /dev/ttyACM0
Connecting....
Detecting chip type... ESP32-S3
Chip is ESP32-S3 (QFN56) (revision v0.2)
Features: WiFi, BLE, Embedded PSRAM 2MB (AP_3v3)
Crystal is 40MHz
MAC: 3c:84:27:15:99:b4
Uploading stub...
Running stub...
Stub running...
Configuring flash size...
Flash will be erased from 0x00000000 to 0x00102fff...
Flash params set to 0x024f
SHA digest in image updated
Compressed 1059504 bytes to 673992...
Wrote 1059504 bytes (673992 compressed) at 0x00000000 in 59.2 seconds (effective 143.1 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

My first example works!

PXL_20240922_191217647.MP
PXL_20240922_191217647.MP1920×1442 251 KB

Thanks for helping out!

2 Likes
14

Does your example (I recklessly… lent :wink: thanks for that ) survive a reset of the plate / sc01 plus? For some reason, your example works brilliantly after flashing but after rebooting, the screen stays dark.

EDIT:
For some reason, it does now survive a restart - i honestly have no idea, why. Same cable / powersupply, tried it many times. After doing some more flashes but only adding RBG-light, I do not know, why it works now.

15

@Hubert34567 , I had a similar strange, but different, experience. After the first time flashing, streaks kept appearing on the screen, as you can see in the picture, even after a power cycle. After flashing a second time with the same configuration, I had no more stripes. I have no idea why this happened.

16

I am running into an other issue with my wt32-sc01 plus. With a new extended lvgl configuration, my build became larger than 2MB and I run into this error:

Linking .pioenvs/wt32-sc01-plus/ota_data_initial.bin
Error: The program size (2274625 bytes) is greater than maximum allowed (1835008 bytes)
RAM:   [==        ]  18.6% (used 61000 bytes from 327680 bytes)
Flash: [==========]  120.2% (used 2174625 bytes from 1835008 bytes)
*** [checkprogsize] Explicit exit, status 1
========================= [FAILED] Took 439.23 seconds

I understand that I can overcome this problem by using a custom_partitions.csv. I came to this partition table:

# Name,   Type,   SubType, Offset,  Size
nvs,      data,   nvs,     0x9000,  0x5000
otadata,  data,   ota,     0xe000,  0x2000
app0,     app,    ota_0,   0x10000, 0x400000
app1,     app,    ota_1,   0x410000, 0x400000
spiffs,   data,   spiffs,  0x810000, 0x200000

And I added this custom_partitions.csv to my esphome config:

esphome:
  name: ${device_name}
  friendly_name: ${friendly_name}
  name_add_mac_suffix: false
  project:
    name: esphome.w32-sc01-plus
    version: "1.1"
  platformio_options:
    build_unflags: -Werror=all
    board_build.flash_mode: dio
    board_build.flash_size: 16MB
    board_build.partitions: "/config/esphome/custom_partitions.csv"

esp32:
  board: esp32-s3-devkitc-1
  framework:
    type: esp-idf
    sdkconfig_options:
      CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240: y
      CONFIG_ESP32S3_DATA_CACHE_64KB: y
      CONFIG_SPIRAM_FETCH_INSTRUCTIONS: y
      CONFIG_SPIRAM_RODATA: y
      CONFIG_ESPTOOLPY_FLASHSIZE_16MB: y
      CONFIG_ESPTOOLPY_FLASHFREQ_40M: y
      CONFIG_ESPTOOLPY_FLASHMODE_DIO: y

A new build with this configuration ends with this error:

Generating an empty partition .pioenvs/wt32-sc01-plus/ota_data_initial.bin
Archiving .pioenvs/wt32-sc01-plus/bootloader/esp-idf/xtensa/libxtensa.a
Partitions tables occupies 10.1MB of flash (10551296 bytes) which does not fit in configured flash size 4MB. Change the flash size in menuconfig under the 'Serial Flasher Config' menu.
Compiling .pioenvs/wt32-sc01-plus/lib87a/lvgl/core/lv_disp.o
*** [.pioenvs/wt32-sc01-plus/partitions.bin] Error 2
========================= [FAILED] Took 443.28 seconds =========================

Why does the error message indicate that the flash size is 4MB, while I specified a 16MB flash size? What is going wrong here and how can I fix it?

17

But you didn’t tell ESPHome that. Try just setting flash_size: in your config and forget about the custom partitioning.

18

Thanks for your pointer, @clydebarrow! I thought it was enough by specifying the flash size with:

esphome:
  platformio_options:
    board_build.flash_size: 16MB
esp32:
  framework:
    type: esp-idf
    sdkconfig_options:
      CONFIG_ESPTOOLPY_FLASHSIZE_16MB: y

I have now added this:

esp32:
  flash_size: 16MB

Here is my full esphome config: /config/esphome/wt32-sc01-plus.yaml

Although now I managed to build a firmware, at the end it appears that OTA partition is too small and this firmware can only be flashed with USB:

INFO ESPHome 2024.9.1
INFO Reading configuration /config/esphome/wt32-sc01-plus.yaml...
INFO Detected timezone 'Europe/Amsterdam'
INFO Generating C++ source...
INFO Compiling app...
Processing wt32-sc01-plus (board: esp32-s3-devkitc-1; framework: espidf; platform: platformio/[email protected])
--------------------------------------------------------------------------------
HARDWARE: ESP32S3 240MHz, 320KB RAM, 8MB Flash
 - framework-espidf @ 3.40407.240606 (4.4.7) 
 - tool-cmake @ 3.16.9 
 - tool-ninja @ 1.10.2 
 - toolchain-esp32ulp @ 2.35.0-20220830 
 - toolchain-riscv32-esp @ 8.4.0+2021r2-patch5 
 - toolchain-xtensa-esp32s3 @ 8.4.0+2021r2-patch5
Reading CMake configuration...
Dependency Graph
|-- ArduinoJson @ 6.18.5
|-- lvgl @ 8.4.0
|-- noise-c @ 0.1.6
Compiling .pioenvs/wt32-sc01-plus/src/main.o
Linking .pioenvs/wt32-sc01-plus/firmware.elf
RAM:   [=         ]  10.3% (used 33864 bytes from 327680 bytes)
Flash: [=====     ]  50.5% (used 2118161 bytes from 4194304 bytes)
Building .pioenvs/wt32-sc01-plus/firmware.bin
Creating esp32s3 image...
Successfully created esp32s3 image.
esp32_create_combined_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
Wrote 0x215380 bytes to file /data/build/wt32-sc01-plus/.pioenvs/wt32-sc01-plus/firmware.factory.bin, ready to flash to offset 0x0
esp32_copy_ota_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
========================= [SUCCESS] Took 89.84 seconds =========================
INFO Successfully compiled program.
INFO Connecting to 192.168.11.196
INFO Uploading /data/build/wt32-sc01-plus/.pioenvs/wt32-sc01-plus/firmware.bin (2118528 bytes)
ERROR Error binary size: Error: The OTA partition on the ESP is too small. ESPHome needs to resize this partition, please flash over USB.

Question: What changes should I make to my /config/esphome/custom_partitions.csv to make it possible to do OTA firmware updates?

So to bypass OTA flashing, I created a new build, which can be flashed using esptools.py:

INFO ESPHome 2024.9.1
INFO Reading configuration /config/esphome/wt32-sc01-plus.yaml...
INFO Detected timezone 'Europe/Amsterdam'
INFO Generating C++ source...
INFO Compiling app...
Processing wt32-sc01-plus (board: esp32-s3-devkitc-1; framework: espidf; platform: platformio/[email protected])
--------------------------------------------------------------------------------
HARDWARE: ESP32S3 240MHz, 320KB RAM, 8MB Flash
 - framework-espidf @ 3.40407.240606 (4.4.7) 
 - tool-cmake @ 3.16.9 
 - tool-ninja @ 1.10.2 
 - toolchain-esp32ulp @ 2.35.0-20220830 
 - toolchain-riscv32-esp @ 8.4.0+2021r2-patch5 
 - toolchain-xtensa-esp32s3 @ 8.4.0+2021r2-patch5
Reading CMake configuration...
Dependency Graph
|-- ArduinoJson @ 6.18.5
|-- lvgl @ 8.4.0
|-- noise-c @ 0.1.6
Compiling .pioenvs/wt32-sc01-plus/src/main.o
Linking .pioenvs/wt32-sc01-plus/firmware.elf
RAM:   [=         ]  10.3% (used 33864 bytes from 327680 bytes)
Flash: [=====     ]  50.5% (used 2118161 bytes from 4194304 bytes)
Building .pioenvs/wt32-sc01-plus/firmware.bin
Creating esp32s3 image...
Successfully created esp32s3 image.
esp32_create_combined_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
Wrote 0x215380 bytes to file /data/build/wt32-sc01-plus/.pioenvs/wt32-sc01-plus/firmware.factory.bin, ready to flash to offset 0x0
esp32_copy_ota_bin([".pioenvs/wt32-sc01-plus/firmware.bin"], [".pioenvs/wt32-sc01-plus/firmware.elf"])
========================= [SUCCESS] Took 88.10 seconds =========================
INFO Successfully compiled program.

The build was succesfull and flashing went well too:

$ ./esptool.py --port /dev/ttyACM0 write_flash --flash_mode dio --flash_size 16MB 0x0 '/home/tedsluis/Downloads/wt32-sc01-plus.factory (3).bin' 
esptool.py v4.7.0
Serial port /dev/ttyACM0
Connecting....
Detecting chip type... ESP32-S3
Chip is ESP32-S3 (QFN56) (revision v0.2)
Features: WiFi, BLE, Embedded PSRAM 2MB (AP_3v3)
Crystal is 40MHz
MAC: 3c:84:27:15:99:b4
Uploading stub...
Running stub...
Stub running...
Configuring flash size...
Flash will be erased from 0x00000000 to 0x00215fff...
SHA digest in image updated
Compressed 2184064 bytes to 907744...
Wrote 2184064 bytes (907744 compressed) at 0x00000000 in 80.3 seconds (effective 217.7 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...

Unfortunately, after flashing it turned out that the display does not work.
This I see in the log:

[08:53:49]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[08:53:49]etarting app cpu, entry point is 0x403762d8
[08:53:49]ESP-ROM:esp32s3-20210327
[08:53:49]Build:Mar 27 2021
[08:53:49]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[08:53:49]Saved PC:0x40376940
[08:53:49]SPIWP:0xee
[08:53:49]mode:DIO, clock div:1
[08:53:49]load:0x3fce3808,len:0x16c4
[08:53:49]load:0x403c9700,len:0xbc0
[08:53:49]load:0x403cc700,len:0x2e90
[08:53:49]entry 0x403c9950
[08:53:49]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[08:53:49]I (29) boot: compile time 08:27:14
[08:53:49]I (29) boot: Multicore bootloader
[08:53:49]I (31) boot: chip revision: v0.2
[08:53:49]I (35) boot.esp32s3: Boot SPI Speed : 80MHz
[08:53:49]I (40) boot.esp32s3: SPI Mode       : DIO
[08:53:49]I (44) boot.esp32s3: SPI Flash Size : 16MB
[08:53:49]I (49) boot: Enabling RNG early entropy source...
[08:53:49]I (55) boot: Partition Table:
[08:53:49]I (58) boot: ## Label            Usage          Type ST Offset   Length
[08:53:49]I (65) boot:  0 nvs              WiFi data        01 02 00009000 00005000
[08:53:49]I (73) boot:  1 otadata          OTA data         01 00 0000e000 00002000
[08:53:49]I (80) boot:  2 app0             OTA app          00 10 00010000 00400000
[08:53:49]I (88) boot:  3 app1             OTA app          00 11 00410000 00400000
[08:53:49]I (95) boot:  4 spiffs           Unknown data     01 82 00810000 00200000
[08:53:49]I (103) boot: End of partition table
[08:53:49]I (107) esp_image: segment 0: paddr=00010020 vaddr=3c0d0020 size=12e068h (1237096) map
[08:53:50]I (338) esp_image: segment 1: paddr=0013e090 vaddr=3fc96700 size=01f88h (  8072) load
[08:53:50]I (340) esp_image: segment 2: paddr=00140020 vaddr=42000020 size=c0dd8h (789976) map
[08:53:50]I (485) esp_image: segment 3: paddr=00200e00 vaddr=3fc98688 size=01e58h (  7768) load
[08:53:50]I (487) esp_image: segment 4: paddr=00202c60 vaddr=40374000 size=126f4h ( 75508) load
[08:53:50]I (515) boot: Loaded app from partition at offset 0x10000
[08:53:50]I (515) boot: Disabling RNG early entropy source...
[08:53:50]I (515) cpu_start: Multicore app
[08:53:50]I (519) spiram: Found 16MBit SPI RAM device
[08:53:50]I (524) spiram: SPI RAM mode: sram 80m
[08:53:50]I (528) spiram: PSRAM initialized, cache is in normal (1-core) mode.
[08:53:50]I (535) cpu_start: Pro cpu up.
[08:53:50]I (539) cpu_start: Starting app cpu, entry point is 0x403762d8
[08:53:51]ESP-ROM:esp32s3-20210327
[08:53:51]Build:Mar 27 2021
[08:53:51]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[08:53:51]Saved PC:0x40376940
[08:53:51]SPIWP:0xee
[08:53:51]mode:DIO, clock div:1
[08:53:51]load:0x3fce3808,len:0x16c4
[08:53:51]load:0x403c9700,len:0xbc0
[08:53:51]load:0x403cc700,len:0x2e90
[08:53:51]entry 0x403c9950
[08:53:51]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[08:53:51]I (29) boot: compile time 08:27:14
[08:53:51]I (29) boot: Multicore bootloader
[08:53:51]I (31) boot: chip revision: v0.2
[08:53:51]I (35) boot.esp32s3: Boot SPI Speed : 80MHz
[08:53:51]I (40) boot.esp32s3: SPI Mode       : DIO
[08:53:51]I (44) boot.esp32s3: SPI Flash Size : 16MB
[08:53:51]I (49) boot: Enabling RNG early entropy source...
[08:53:51]I (55) boot: Partition Table:
[08:53:51]I (58) boot: ## Label            Usage          Type ST Offset   Length
[08:53:51]I (65) boot:  0 nvs              WiFi data        01 02 00009000 00005000
[08:53:51]I (73) boot:  1 otadata          OTA data         01 00 0000e000 00002000
[08:53:51]I (80) boot:  2 app0             OTA app          00 10 00010000 00400000
[08:53:51]I (88) boot:  3 app1             OTA app          00 11 00410000 00400000
[08:53:51]I (95) boot:  4 spiffs           Unknown data     01 82 00810000 00200000
[08:53:51]I (103) boot: End of partition table
[08:53:51]I (107) esp_image: segment 0: paddr=00010020 vaddr=3c0d0020 size=12e068h (1237096) map
[08:53:51]I (338) esp_image: segment 1: paddr=0013e090 vaddr=3fc96700 size=01f88h (  8072) load
[08:53:51]I (340) esp_image: segment 2: paddr=00140020 vaddr=42000020 size=c0dd8h (789976) map
[08:53:51]I (485) esp_image: segment 3: paddr=00200e00 vaddr=3fc98688 size=01e58h (  7768) load
[08:53:51]I (487) esp_image: segment 4: paddr=00202c60 vaddr=40374000 size=126f4h ( 75508) load
[08:53:51]I (515) boot: Loaded app from partition at offset 0x10000
[08:53:51]I (515) boot: Disabling RNG early entropy source...
[08:53:51]I (515) cpu_start: Multicore app
[08:53:51]I (519) spiram: Found 16MBit SPI RAM device
[08:53:51]I (524) spiram: SPI RAM mode: sram 80m
[08:53:51]I (528) spiram: PSRAM initialized, cache is in normal (1-core) mode.
[08:53:51]I (535) cpu_start: Pro cpu up.
[08:53:51]I (539) cpu_start: Starting app cpu, entry point is 0x403762d8
[08:53:52]ESP-ROM:esp32s3-20210327
[08:53:52]Build:Mar 27 2021
[08:53:52]rst:0xc (RTC_SW_CPU_RST),boot:0xa (SPI_FAST_FLASH_BOOT)
[08:53:52]Saved PC:0x40376940
[08:53:52]SPIWP:0xee
[08:53:52]mode:DIO, clock div:1
[08:53:52]load:0x3fce3808,len:0x16c4
[08:53:52]load:0x403c9700,len:0xbc0
[08:53:52]load:0x403cc700,len:0x2e90
[08:53:52]entry 0x403c9950
[08:53:52]I (29) boot: ESP-IDF 4.4.7 2nd stage bootloader
[08:53:52]I (29) boot: compile time 08:27:14
[08:53:52]I (29) boot: Multicore bootloader
[08:53:52]I (31) boot: chip revision: v0.2
[08:53:52]I (35) boot.esp32s3: Boot SPI Speed : 80MHz
[08:53:52]I (40) boot.esp32s3: SPI Mode       : DIO
[08:53:52]I (44) boot.esp32s3: SPI Flash Size : 16MB
[08:53:52]I (49) boot: Enabling RNG early entropy source...
[08:53:52]I (55) boot: Partition Table:

It seems to be in a boot loop.
Does anyone have an idea what is going on?
How can I fix this?

19

Yes, when the partitioning is changed you need to flash over USB - once that is done you will be able to update via OTA.

I posted a working config earlier in this topic - I’d suggest you start with that. Flash the known working config first (over USB) then change the flash size and reflash. Start adding your code in one thing at a time, then if something fails you will know what to look at.

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20

And I’m still using it :smile:

1000053347
10000533471920×1440 439 KB

1000053298
10000532981920×1440 262 KB

My config, if it can be helpful for you, can be found here (and everything in battery-controller folder)

4 Likes